Mikita Lipski fa2123dbcc drm/amd/display: Multi display synchronization logic ... This feature synchronizes multiple displays with various timings to a display with the highest refresh rate it is enabled if edid caps flag multi_display_sync is set to one There are limitations on refresh rates allowed that can be synchronized. That would prevent from underflow and other potential corruptions. Multi display synchronization is using the same functions as timing_sync in order to minimize redunduncy and decision to disable synchronization is based on trigger parametre set in DM Feature is developed for DCN1 and DCE11 Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-12-06 12:47:22 -05:00
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acp	drm: amd: remove broken include path	2017-03-14 19:19:44 -04:00
amdgpu	drm/amdgpu: Implement BO size validation V2	2017-12-06 12:47:22 -05:00
amdkfd	Merge tag 'drm-amdkfd-fixes-2017-11-26' of git://people.freedesktop.org/~gabbayo/linux into drm-fixes	2017-12-01 09:14:46 +10:00
display	drm/amd/display: Multi display synchronization logic	2017-12-06 12:47:22 -05:00
include	drm/amdgpu: add new pp function point notify_smu_memory_info	2017-12-04 16:33:18 -05:00
lib	drm/amd/chash: Fix typo	2017-09-28 16:03:29 -04:00
powerplay	drm/amd/pp: delete an outdated comment in amd_powerplay.c	2017-12-04 16:33:19 -05:00
scheduler	drm/amd/scheduler: add WARN_ON for s_fence->parent	2017-12-06 12:47:18 -05:00