mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-03-06 21:00:31 +01:00
Merge branch 'melonDS-emu:master' into performance/gpu3d
This commit is contained in:
Valtýr Kári Daníelsson
GitHub
commit
9bf392eecd
11 changed files with 176 additions and 15 deletions
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@ -1086,11 +1086,34 @@ void InvalidateByAddr(u32 localAddr)
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void CheckAndInvalidateITCM()
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{
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for (u32 i = 0; i < ITCMPhysicalSize; i+=16)
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for (u32 i = 0; i < ITCMPhysicalSize; i+=512)
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{
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if (CodeIndexITCM[i / 512].Code & (1 << ((i & 0x1FF) / 16)))
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if (CodeIndexITCM[i / 512].Code)
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{
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InvalidateByAddr(i | (ARMJIT_Memory::memregion_ITCM << 27));
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// maybe using bitscan would be better here?
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// The thing is that in densely populated sets
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// The old fashioned way can actually be faster
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for (u32 j = 0; j < 512; j += 16)
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{
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if (CodeIndexITCM[i / 512].Code & (1 << ((j & 0x1FF) / 16)))
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InvalidateByAddr((i+j) | (ARMJIT_Memory::memregion_ITCM << 27));
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}
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}
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}
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}
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void CheckAndInvalidateWVRAM(int bank)
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{
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u32 start = bank == 1 ? 0x20000 : 0;
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for (u32 i = start; i < start+0x20000; i+=512)
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{
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if (CodeIndexARM7WVRAM[i / 512].Code)
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{
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for (u32 j = 0; j < 512; j += 16)
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{
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if (CodeIndexARM7WVRAM[i / 512].Code & (1 << ((j & 0x1FF) / 16)))
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InvalidateByAddr((i+j) | (ARMJIT_Memory::memregion_VWRAM << 27));
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}
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}
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}
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}
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@ -44,6 +44,7 @@ void DeInit();
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void Reset();
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void CheckAndInvalidateITCM();
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void CheckAndInvalidateWVRAM(int bank);
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void InvalidateByAddr(u32 pseudoPhysical);
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@ -134,6 +134,9 @@ void ARMv5::UpdateITCMSetting()
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if (CP15Control & (1<<18))
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{
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ITCMSize = 0x200 << ((ITCMSetting >> 1) & 0x1F);
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#ifdef JIT_ENABLED
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FastBlockLookupSize = 0;
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#endif
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}
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else
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{
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113
src/DSi.cpp
113
src/DSi.cpp
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@ -159,7 +159,7 @@ void Reset()
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SCFG_Clock7 = 0x0187;
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SCFG_EXT[0] = 0x8307F100;
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SCFG_EXT[1] = 0x93FFFB06;
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SCFG_MC = 0x0010;//0x0011;
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SCFG_MC = 0x0010 | (~((u32)NDSCart::CartInserted)&1);//0x0011;
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SCFG_RST = 0;
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DSi_DSP::SetRstLine(false);
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@ -248,6 +248,14 @@ void DoSavestate(Savestate* file)
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SDIO->DoSavestate(file);
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}
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void SetCartInserted(bool inserted)
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{
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if (inserted)
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SCFG_MC &= ~1;
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else
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SCFG_MC |= 1;
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}
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void DecryptModcryptArea(u32 offset, u32 size, u8* iv)
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{
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AES_ctx ctx;
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@ -2638,6 +2646,9 @@ u8 ARM7IORead8(u32 addr)
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case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 48) & 0xFF;
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case 0x04004D07: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 56;
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case 0x04004D08: return 0;
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case 0x4004700: return DSi_DSP::SNDExCnt;
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case 0x4004701: return DSi_DSP::SNDExCnt >> 8;
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}
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return NDS::ARM7IORead8(addr);
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@ -2670,6 +2681,8 @@ u16 ARM7IORead16(u32 addr)
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 32) & 0xFFFF;
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case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 48;
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case 0x04004D08: return 0;
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case 0x4004700: return DSi_DSP::SNDExCnt;
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}
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if (addr >= 0x04004800 && addr < 0x04004A00)
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@ -2741,6 +2754,10 @@ u32 ARM7IORead32(u32 addr)
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID & 0xFFFFFFFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 32;
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case 0x04004D08: return 0;
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case 0x4004700:
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printf("32-Bit SNDExCnt read? %08X\n", NDS::ARM7->R[15]);
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return DSi_DSP::SNDExCnt;
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}
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if (addr >= 0x04004800 && addr < 0x04004A00)
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@ -2788,6 +2805,46 @@ void ARM7IOWrite8(u32 addr, u8 val)
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case 0x04004500: DSi_I2C::WriteData(val); return;
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case 0x04004501: DSi_I2C::WriteCnt(val); return;
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case 0x4004700:
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DSi_DSP::WriteSNDExCnt((u16)val | (DSi_DSP::SNDExCnt & 0xFF00));
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return;
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case 0x4004701:
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DSi_DSP::WriteSNDExCnt(((u16)val << 8) | (DSi_DSP::SNDExCnt & 0x00FF));
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return;
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}
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if (addr >= 0x04004420 && addr < 0x04004430)
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{
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u32 shift = (addr&3)*8;
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addr -= 0x04004420;
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addr &= ~3;
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DSi_AES::WriteIV(addr, (u32)val << shift, 0xFF << shift);
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return;
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}
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if (addr >= 0x04004430 && addr < 0x04004440)
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{
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u32 shift = (addr&3)*8;
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addr -= 0x04004430;
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addr &= ~3;
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DSi_AES::WriteMAC(addr, (u32)val << shift, 0xFF << shift);
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return;
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}
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if (addr >= 0x04004440 && addr < 0x04004500)
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{
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u32 shift = (addr&3)*8;
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addr -= 0x04004440;
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addr &= ~3;
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int n = 0;
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while (addr >= 0x30) { addr -= 0x30; n++; }
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switch (addr >> 4)
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{
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case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
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case 1: DSi_AES::WriteKeyX(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
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case 2: DSi_AES::WriteKeyY(n, addr&0xF, (u32)val << shift, 0xFF << shift); return;
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}
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}
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return NDS::ARM7IOWrite8(addr, val);
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@ -2819,12 +2876,51 @@ void ARM7IOWrite16(u32 addr, u16 val)
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case 0x04004062:
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if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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u32 tmp = MBK[0][8];
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tmp &= ~(0xffff << ((addr % 4) * 8));
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tmp |= (val << ((addr % 4) * 8));
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MBK[0][8] = tmp & 0x00FFFF0F;
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MBK[1][8] = MBK[0][8];
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{
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u32 tmp = MBK[0][8];
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tmp &= ~(0xffff << ((addr % 4) * 8));
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tmp |= (val << ((addr % 4) * 8));
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MBK[0][8] = tmp & 0x00FFFF0F;
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MBK[1][8] = MBK[0][8];
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}
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return;
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case 0x4004700:
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DSi_DSP::WriteSNDExCnt(val);
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return;
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}
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if (addr >= 0x04004420 && addr < 0x04004430)
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{
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u32 shift = (addr&1)*16;
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addr -= 0x04004420;
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addr &= ~1;
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DSi_AES::WriteIV(addr, (u32)val << shift, 0xFFFF << shift);
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return;
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}
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if (addr >= 0x04004430 && addr < 0x04004440)
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{
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u32 shift = (addr&1)*16;
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addr -= 0x04004430;
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addr &= ~1;
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DSi_AES::WriteMAC(addr, (u32)val << shift, 0xFFFF << shift);
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return;
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}
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if (addr >= 0x04004440 && addr < 0x04004500)
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{
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u32 shift = (addr&1)*16;
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addr -= 0x04004440;
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addr &= ~1;
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int n = 0;
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while (addr >= 0x30) { addr -= 0x30; n++; }
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switch (addr >> 4)
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{
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case 0: DSi_AES::WriteKeyNormal(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
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case 1: DSi_AES::WriteKeyX(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
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case 2: DSi_AES::WriteKeyY(n, addr&0xF, (u32)val << shift, 0xFFFF << shift); return;
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}
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}
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if (addr >= 0x04004800 && addr < 0x04004A00)
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@ -2924,6 +3020,11 @@ void ARM7IOWrite32(u32 addr, u32 val)
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case 0x04004400: DSi_AES::WriteCnt(val); return;
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case 0x04004404: DSi_AES::WriteBlkCnt(val); return;
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case 0x04004408: DSi_AES::WriteInputFIFO(val); return;
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case 0x4004700:
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printf("32-Bit SNDExCnt write? %08X %08X\n", val, NDS::ARM7->R[15]);
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DSi_DSP::WriteSNDExCnt(val);
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return;
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}
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if (addr >= 0x04004420 && addr < 0x04004430)
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@ -59,6 +59,8 @@ void Reset();
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void DoSavestate(Savestate* file);
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void SetCartInserted(bool inserted);
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void SetupDirectBoot();
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void SoftReset();
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@ -27,6 +27,9 @@
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namespace DSi_DSP
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{
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// not sure whether to not rather put it somewhere else
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u16 SNDExCnt;
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Teakra::Teakra* TeakraCore;
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bool SCFG_RST;
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@ -151,6 +154,8 @@ void Reset()
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TeakraCore->Reset();
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NDS::CancelEvent(NDS::Event_DSi_DSP);
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SNDExCnt = 0;
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}
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bool IsRstReleased()
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@ -548,6 +553,21 @@ void Write32(u32 addr, u32 val)
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Write16(addr, val & 0xFFFF);
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}
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void WriteSNDExCnt(u16 val)
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{
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// it can be written even in NDS mode
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// mic frequency can only be changed if it was disabled
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// before the write
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if (SNDExCnt & 0x8000)
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{
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val &= ~0x2000;
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val |= SNDExCnt & 0x2000;
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}
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SNDExCnt = val & 0xE00F;
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}
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void Run(u32 cycles)
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{
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if (!IsDSPCoreEnabled())
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@ -24,11 +24,12 @@
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// TODO: for actual sound output
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// * audio callbacks
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// * SNDEXCNT
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namespace DSi_DSP
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{
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extern u16 SNDExCnt;
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extern u16 DSP_PDATA;
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extern u16 DSP_PADR;
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extern u16 DSP_PCFG;
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@ -65,6 +66,8 @@ void Write16(u32 addr, u16 val);
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u32 Read32(u32 addr);
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void Write32(u32 addr, u32 val);
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void WriteSNDExCnt(u16 val);
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// NOTE: checks SCFG_CLK9
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void Run(u32 cycles);
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@ -477,16 +477,14 @@ u16 DSi_SDHost::Read(u32 addr)
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{
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if (Ports[0]) // basic check of whether the SD card is inserted
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{
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ret |= 0x0030;
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ret |= 0x0020;
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if (!Ports[0]->ReadOnly) ret |= 0x0080;
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}
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else
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ret |= 0x0008;
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}
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else
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{
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// SDIO wifi is always inserted, I guess
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ret |= 0x00B0;
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ret |= 0x00A0;
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}
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return ret;
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}
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@ -21,6 +21,10 @@
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#include "NDS.h"
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#include "GPU.h"
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#ifdef JIT_ENABLED
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#include "ARMJIT.h"
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#endif
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#include "GPU2D_Soft.h"
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namespace GPU
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@ -653,6 +657,9 @@ void MapVRAM_CD(u32 bank, u8 cnt)
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VRAMMap_ARM7[ofs] |= bankmask;
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memset(VRAMDirty[bank].Data, 0xFF, sizeof(VRAMDirty[bank].Data));
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VRAMSTAT |= (1 << (bank-2));
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#ifdef JIT_ENABLED
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ARMJIT::CheckAndInvalidateWVRAM(ofs);
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#endif
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break;
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case 3: // texture
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@ -1679,6 +1679,7 @@ bool LoadROM(const u8* romdata, u32 romlen)
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}
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CartInserted = true;
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DSi::SetCartInserted(true);
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u32 irversion = 0;
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if ((gamecode & 0xFF) == 'I')
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@ -1738,6 +1739,8 @@ void EjectCart()
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CartROMSize = 0;
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CartID = 0;
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DSi::SetCartInserted(false);
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// CHECKME: does an eject imply anything for the ROM/SPI transfer registers?
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}
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@ -104,7 +104,7 @@ elseif (WIN32)
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target_sources(melonDS PUBLIC "${CMAKE_SOURCE_DIR}/melon.rc")
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target_link_libraries(melonDS PRIVATE ws2_32 iphlpapi)
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set_target_properties(melonDS PROPERTIES WIN32_EXECUTABLE $<CONFIG:Release>)
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set_target_properties(melonDS PROPERTIES LINK_FLAGS_DEBUG "-mconsole")
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endif()
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if (PORTABLE)
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