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ea71a9004e
the only part of TP_ADJ that was not uniquely determined by TLS_ABOVE_TP was the 0x7000 adjustment used mainly on mips and powerpc variants.
32 lines
722 B
C
32 lines
722 B
C
#if ((__ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
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|| __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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static inline pthread_t __pthread_self()
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{
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char *p;
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__asm__ ( "mrc p15,0,%0,c13,c0,3" : "=r"(p) );
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return (void *)(p-sizeof(struct pthread));
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}
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#else
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#if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
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#define BLX "mov lr,pc\n\tbx"
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#else
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#define BLX "blx"
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#endif
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static inline pthread_t __pthread_self()
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{
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extern hidden uintptr_t __a_gettp_ptr;
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register uintptr_t p __asm__("r0");
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__asm__ ( BLX " %1" : "=r"(p) : "r"(__a_gettp_ptr) : "cc", "lr" );
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return (void *)(p-sizeof(struct pthread));
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}
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#endif
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#define TLS_ABOVE_TP
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#define GAP_ABOVE_TP 8
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#define MC_PC arm_pc
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