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linux/arch/riscv/include/asm/vdso
Minda Chen dd16ac404a
riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause
Actually it is a part of Conor's
commit aae538cd03 ("riscv: fix detection of toolchain
Zihintpause support").
It is looks like a merge issue. Samuel's
commit 0b1d60d6dd ("riscv: Fix build with
CONFIG_CC_OPTIMIZE_FOR_SIZE=y") do not base on Conor's commit and
revert to __riscv_zihintpause. So this patch can fix it.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Fixes: 3c349eacc5 ("Merge patch "riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y"")
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230802064215.31111-1-minda.chen@starfivetech.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-10-31 19:15:54 -07:00
..
clocksource.h riscv: use vDSO common flow to reduce the latency of the time-related functions 2020-06-10 19:47:16 -07:00
data.h RISC-V: Add hwprobe vDSO function and data 2023-04-18 15:48:18 -07:00
gettimeofday.h RISC-V: Add hwprobe vDSO function and data 2023-04-18 15:48:18 -07:00
processor.h riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause 2023-10-31 19:15:54 -07:00
vsyscall.h riscv: use vDSO common flow to reduce the latency of the time-related functions 2020-06-10 19:47:16 -07:00