Conor Dooley bfc1d3a901 riscv: dts: renesas: Convert isa detection to new properties ... Convert the RZ/Five devicetrees to use the new properties "riscv,isa-base" & "riscv,isa-extensions". For compatibility with other projects, "riscv,isa" remains. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231009-smog-gag-3ba67e68126b@wendy Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>		2023-11-13 14:35:36 +01:00
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Makefile	riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK	2022-11-10 16:36:34 +01:00
r9a07g043f.dtsi	riscv: dts: renesas: Convert isa detection to new properties	2023-11-13 14:35:36 +01:00
r9a07g043f01-smarc.dts	riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK	2022-11-10 16:36:34 +01:00
rzfive-smarc-som.dtsi	riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled	2023-10-05 14:25:00 +02:00
rzfive-smarc.dtsi	riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled	2023-10-05 14:25:00 +02:00