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linux/arch/riscv/boot/dts
Inochi Amaoto 1f4a994be2
riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format
Change the timer layout in the dtb to fit the format that needed by
the SBI.

Fixes: 967a94a92a ("riscv: dts: add initial Sophgo SG2042 SoC device tree")
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-01-26 13:33:52 +01:00
..
allwinner riscv: dts: allwinner: convert isa detection to new properties 2023-10-13 21:19:25 +02:00
canaan riscv: dts: canaan: drop invalid spi-max-frequency 2023-03-26 23:58:27 +01:00
microchip SoC: DT changes for 6.8 2024-01-11 11:23:17 -08:00
renesas riscv: dts: renesas: Convert isa detection to new properties 2023-11-13 14:35:36 +01:00
sifive riscv: dts: sifive: convert isa detection to new properties 2023-10-15 13:16:05 +01:00
sophgo riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format 2024-01-26 13:33:52 +01:00
starfive riscv: dts: starfive: Enable SDIO wifi on JH7100 boards 2023-12-13 15:50:23 +00:00
thead riscv: dts: thead: Enable LicheePi 4A eMMC and microSD 2023-12-12 19:06:51 +00:00
Makefile riscv: dts: sophgo: add Milk-V Pioneer board device tree 2023-10-07 11:17:01 +01:00