Inochi Amaoto 1f4a994be2 riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format ... Change the timer layout in the dtb to fit the format that needed by the SBI. Fixes: 967a94a92a ("riscv: dts: add initial Sophgo SG2042 SoC device tree") Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2024-01-26 13:33:52 +01:00
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cv18xx.dtsi	SoC: DT changes for 6.8	2024-01-11 11:23:17 -08:00
cv1800b-milkv-duo.dts	riscv: dts: sophgo: add Milk-V Duo board device tree	2023-10-07 14:17:18 +01:00
cv1800b.dtsi	riscv: dts: sophgo: Separate compatible specific for CV1800B soc	2023-11-30 12:40:36 +00:00
cv1812h-huashan-pi.dts	riscv: dts: sophgo: add Huashan Pi board device tree	2023-11-30 12:40:36 +00:00
cv1812h.dtsi	riscv: dts: sophgo: add initial CV1812H SoC device tree	2023-11-30 12:40:36 +00:00
Makefile	riscv: dts: sophgo: add Huashan Pi board device tree	2023-11-30 12:40:36 +00:00
sg2042-cpus.dtsi
sg2042-milkv-pioneer.dts	riscv: dts: sophgo: add Milk-V Pioneer board device tree	2023-10-07 11:17:01 +01:00
sg2042.dtsi	riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format	2024-01-26 13:33:52 +01:00