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small improvement to card read timings

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This commit is contained in:
Jaklyy 2025-01-01 01:00:22 -05:00
parent e7cba2ef55
commit aa2e827ce1
1 changed files with 10 additions and 9 deletions
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19
src/NDSCart.cpp
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@ -1910,13 +1910,13 @@ void NDSCartSlot::WriteROMCnt(u32 val) noexcept
// ROM transfer timings
// the bus is parallel with 8 bits
// thus a command would take 8 cycles to be transferred (...actually it's 9? 1 cycle for processing?)
// and it would take 4 cycles to receive a word of data
// thus a command would take 8 cycles to be transferred (...actually it's 10?? checkme: does this apply to every command?)
// and it would take 4 cycles to receive a word of data (...or 3? does it overlap a cycle somewhere?)
// TODO: advance read position if bit28 is set
// TODO: during a write transfer, bit23 is set immediately when beginning the transfer(?)
u32 xfercycle = (ROMCnt & (1<<27)) ? 8 : 5;
u32 cmddelay = 9;
u32 cmddelay = 10;
// delays are only applied when the WR bit is cleared
// CHECKME: do the delays apply at the end (instead of start) when WR is set?
@ -1927,14 +1927,14 @@ void NDSCartSlot::WriteROMCnt(u32 val) noexcept
}
if (datasize == 0)
NDS.ScheduleEvent(Event_ROMTransfer, false, xfercycle*cmddelay+3, ROMTransfer_End, 0);
NDS.ScheduleEvent(Event_ROMTransfer, false, xfercycle*cmddelay+4, ROMTransfer_End, 0);
else
{
NDS.ScheduleEvent(Event_ROMTransfer, false, xfercycle*(cmddelay+4)+3, ROMTransfer_PrepareData, 0);
NDS.ScheduleEvent(Event_ROMTransfer, false, xfercycle*(cmddelay+3)+3, ROMTransfer_PrepareData, 0);
u64 curts;
if (NDS.ExMemCnt[0] & (1<<11)) curts = NDS.ARM7Timestamp;
else curts = (std::max(NDS.ARM9Timestamp, NDS.DMA9Timestamp) + ((1<<NDS.ARM9ClockShift)-1)) >> NDS.ARM9ClockShift;
else curts = (std::max(NDS.ARM9Timestamp, NDS.DMA9Timestamp)) >> NDS.ARM9ClockShift;
ROMTransferTime = (xfercycle*(cmddelay+8)) + curts + 3;
}
@ -1947,6 +1947,7 @@ void NDSCartSlot::AdvanceROMTransfer() noexcept
if (TransferPos < TransferLen)
{
u32 xfercycle = (ROMCnt & (1<<27)) ? 8 : 5;
u32 extdelay = (ROMCnt & (1<<27)) ? 7 : 5; // why is this only 7...?
u32 delay = 4;
if (!(ROMCnt & (1<<30)))
{
@ -1956,11 +1957,11 @@ void NDSCartSlot::AdvanceROMTransfer() noexcept
u64 curts;
if (NDS.ExMemCnt[0] & (1<<11)) curts = NDS.ARM7Timestamp;
else curts = (std::max(NDS.ARM9Timestamp, NDS.DMA9Timestamp) + ((1<<NDS.ARM9ClockShift)-1)) >> NDS.ARM9ClockShift;
else curts = (std::max(NDS.ARM9Timestamp, NDS.DMA9Timestamp)) >> NDS.ARM9ClockShift;
NDS.ScheduleEvent(Event_ROMTransfer, false, std::max((int)(ROMTransferTime-curts), 3), ROMTransfer_PrepareData, 0);
NDS.ScheduleEvent(Event_ROMTransfer, false, ROMTransferTime-curts, ROMTransfer_PrepareData, 0);
ROMTransferTime = (xfercycle*delay) + std::max(curts+3, ROMTransferTime);
ROMTransferTime = (xfercycle*delay) + std::max(curts+extdelay, ROMTransferTime);
}
else
ROMEndTransfer(0);