mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-03-06 21:00:31 +01:00
attempt to make read/write timings more accurate?
idk what i just wrote tbh
This commit is contained in:
Jaklyy
parent
1bd9e87311
commit
e7cba2ef55
2 changed files with 91 additions and 75 deletions
160
src/CP15.cpp
160
src/CP15.cpp
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@ -330,29 +330,10 @@ void ARMv5::UpdateRegionTimings(u32 addrstart, u32 addrend)
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{
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u8* bustimings = NDS.ARM9MemTimings[i];
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if (NDS.ARM9ClockShift == 1)
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{
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MemTimings[i][0] = (bustimings[0] << NDS.ARM9ClockShift) - 1;
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MemTimings[i][1] = (bustimings[2] << NDS.ARM9ClockShift) - 1;
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MemTimings[i][2] = bustimings[3] << NDS.ARM9ClockShift; // sequentials technically should probably be -1 as well?
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// but it doesn't really matter as long as i also dont force align the start of sequential accesses, now does it?
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}
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else
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{
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if (NDS.ARM9Regions[i] != Mem9_MainRAM)
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{
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// 133MHz clock has 1 less bus cycle penalty on ns accesses
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MemTimings[i][0] = ((bustimings[0] - 1) << NDS.ARM9ClockShift) - 1;
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MemTimings[i][1] = ((bustimings[2] - 1) << NDS.ARM9ClockShift) - 1;
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}
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else
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{
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// we handle the different timings for main ram in the read/write functions (they're slightly more complicated...)
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MemTimings[i][0] = (bustimings[0] << NDS.ARM9ClockShift) - 1;
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MemTimings[i][1] = (bustimings[2] << NDS.ARM9ClockShift) - 1;
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}
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MemTimings[i][2] = bustimings[3] << NDS.ARM9ClockShift;
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}
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MemTimings[i][0] = (bustimings[0] << NDS.ARM9ClockShift) - 1;
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MemTimings[i][1] = (bustimings[2] << NDS.ARM9ClockShift) - 1;
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MemTimings[i][2] = (bustimings[3] << NDS.ARM9ClockShift) - 1; // sequentials technically should probably be -1 as well?
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// but it doesn't really matter as long as i also dont force align the start of sequential accesses, now does it?
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}
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}
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@ -532,13 +513,15 @@ void ARMv5::ICacheLookup_2()
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// Wait until the entire cache line is filled before continuing with execution
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if (CP15BISTTestStateRegister & CP15_BIST_TR_DISABLE_ICACHE_STREAMING) [[unlikely]]
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{
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NDS.ARM9Timestamp += MemTimings[tag >> 14][1] + (MemTimings[tag >> 14][2] * ((DCACHE_LINELENGTH / 4) - 1));
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u32 stall = (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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NDS.ARM9Timestamp += (MemTimings[tag >> 14][1] + stall) + ((MemTimings[tag >> 14][2] + 1) * ((DCACHE_LINELENGTH / 4) - 1));
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if (NDS.ARM9Timestamp < TimestampMemory) NDS.ARM9Timestamp = TimestampMemory; // this should never trigger in practice
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}
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else // ICache Streaming logic
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{
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u8 ns = MemTimings[addr>>14][1];
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u8 seq = MemTimings[addr>>14][2];
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u32 stall = (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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u8 ns = MemTimings[addr>>14][1] + stall;
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u8 seq = MemTimings[addr>>14][2] + 1;
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u8 linepos = (addr & 0x1F) / 4; // technically this is one too low, but we want that actually
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@ -774,8 +757,10 @@ void ARMv5::DCacheLookup_3()
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{
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp += MemTimings[tag >> 14][1] + (MemTimings[tag >> 14][2] * ((DCACHE_LINELENGTH / 4) - 1));
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DataCycles = MemTimings[tag>>14][2];
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u32 stall = (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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NDS.ARM9Timestamp += (MemTimings[tag >> 14][1] + stall) + ((MemTimings[tag >> 14][2] + 1) * ((DCACHE_LINELENGTH / 4) - 1));
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DataCycles = MemTimings[tag>>14][2] + 1;
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DataRegion = NDS.ARM9Regions[addr>>14];
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if (((NDS.ARM9Timestamp <= WBReleaseTS) && (NDS.ARM9Regions[addr>>14] == WBLastRegion)) // check write buffer
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@ -789,9 +774,10 @@ void ARMv5::DCacheLookup_3()
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NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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u8 ns = MemTimings[addr>>14][1];
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u8 seq = MemTimings[addr>>14][2];
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u32 stall = (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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u8 ns = MemTimings[addr>>14][1] + stall;
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u8 seq = MemTimings[addr>>14][2] + 1;
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u8 linepos = (addr & 0x1F) >> 2; // technically this is one too low, but we want that actually
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@ -1194,7 +1180,7 @@ bool ARMv5::WriteBufferHandle()
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NDS.MainRAMTimestamp = NDS.A9ContentionTS + 9;
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NDS.MainRAMLastAccess = A9LAST;
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}
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else cycles = (MemTimings[WBCurAddr>>14][0] - 5) >> NDS.ARM9ClockShift; // todo: twl timings
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else cycles = NDS.ARM9MemTimings[WBCurAddr>>14][0]; // todo: twl timings
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break;
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}
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case 1:
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@ -1208,7 +1194,7 @@ bool ARMv5::WriteBufferHandle()
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cycles = 3;
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NDS.MainRAMLastAccess = A9LAST;
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}
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else cycles = (MemTimings[WBCurAddr>>14][0] - 5) >> NDS.ARM9ClockShift; // todo: twl timings
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else cycles = NDS.ARM9MemTimings[WBCurAddr>>14][0]; // todo: twl timings
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break;
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}
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case 3:
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@ -1226,7 +1212,7 @@ bool ARMv5::WriteBufferHandle()
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}
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else
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{
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cycles = MemTimings[WBCurAddr>>14][2] >> NDS.ARM9ClockShift;
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cycles = NDS.ARM9MemTimings[WBCurAddr>>14][3];
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break;
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}
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}
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@ -1241,7 +1227,7 @@ bool ARMv5::WriteBufferHandle()
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cycles = 4;
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NDS.MainRAMLastAccess = A9LAST;
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}
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else cycles = (MemTimings[WBCurAddr>>14][1] - 5) >> NDS.ARM9ClockShift; // todo: twl timings
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else cycles = NDS.ARM9MemTimings[WBCurAddr>>14][2]; // todo: twl timings
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break;
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}
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}
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@ -2265,7 +2251,11 @@ void ARMv5::CodeRead32_4()
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{
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u32 addr = FetchAddr[16];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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RetVal = BusRead32(addr);
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u8 cycles = MemTimings[addr >> 14][1];
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@ -2276,8 +2266,6 @@ void ARMv5::CodeRead32_4()
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Store = false;
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DataRegion = Mem9_Null;
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RetVal = BusRead32(addr);
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QueueFunction(DelayedQueue);
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}
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@ -2418,15 +2406,17 @@ void ARMv5::DRead8_5()
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u32 addr = FetchAddr[reg];
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u32 dummy; u32* val = (LDRFailedRegs & (1<<reg)) ? &dummy : &R[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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*val = BusRead8(addr);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][0];
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DataCycles = 3<<NDS.ARM9ClockShift;
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if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead8(addr);
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}
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void ARMv5::DCacheFin16()
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@ -2555,15 +2545,17 @@ void ARMv5::DRead16_5()
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u32 addr = FetchAddr[reg];
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u32 dummy; u32* val = (LDRFailedRegs & (1<<reg)) ? &dummy : &R[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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*val = BusRead16(addr);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][0];
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DataCycles = 3<<NDS.ARM9ClockShift;
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if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead16(addr);
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}
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void ARMv5::DCacheFin32()
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@ -2695,7 +2687,11 @@ void ARMv5::DRead32_5()
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u32 addr = FetchAddr[reg];
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u32 dummy; u32* val = (LDRFailedRegs & (1<<reg)) ? &dummy : &R[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += (4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift;
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*val = BusRead32(addr);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][1];
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DataCycles = 3<<NDS.ARM9ClockShift;
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@ -2703,7 +2699,6 @@ void ARMv5::DRead32_5()
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if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead32(addr);
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LDRRegs &= ~1<<reg;
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}
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@ -2808,6 +2803,8 @@ void ARMv5::DRead32S_4()
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}
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else
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{
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataRegion = NDS.ARM9Regions[addr>>14];
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if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
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NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
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@ -2817,8 +2814,6 @@ void ARMv5::DRead32S_4()
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}
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else // ns
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{
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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if ((addr >> 24) == 0x02)
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{
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MRTrack.Type = MainRAMType::Fetch;
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@ -2829,6 +2824,8 @@ void ARMv5::DRead32S_4()
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}
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else
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{
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataRegion = NDS.ARM9Regions[addr>>14];
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if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
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NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
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@ -2844,7 +2841,9 @@ void ARMv5::DRead32S_5A()
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u32 addr = FetchAddr[reg];
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u32 dummy; u32* val = (LDRFailedRegs & (1<<reg)) ? &dummy : &R[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead32(addr);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr>>14][2];
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DataCycles = MemTimings[addr>>14][2];
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@ -2852,7 +2851,6 @@ void ARMv5::DRead32S_5A()
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if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead32(addr);
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LDRRegs &= ~1<<reg;
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}
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@ -2862,7 +2860,9 @@ void ARMv5::DRead32S_5B()
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u32 addr = FetchAddr[reg];
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u32 dummy; u32* val = (LDRFailedRegs & (1<<reg)) ? &dummy : &R[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead32(addr);
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NDS.ARM9Timestamp += MemTimings[addr>>14][1];
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DataCycles = 3<<NDS.ARM9ClockShift;
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@ -2870,7 +2870,6 @@ void ARMv5::DRead32S_5B()
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if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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*val = BusRead32(addr);
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LDRRegs &= ~1<<reg;
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}
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@ -2991,16 +2990,19 @@ void ARMv5::DWrite8_5()
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u32 addr = FetchAddr[reg];
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u8 val = STRVal[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp += ((4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][0] + 1;
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BusWrite8(addr, val);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp -= 1;
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][0];
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DataCycles = 3<<NDS.ARM9ClockShift;
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DataRegion = NDS.ARM9Regions[addr>>14];
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if (WBTimestamp < ((NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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BusWrite8(addr, val);
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}
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bool ARMv5::DataWrite16(u32 addr, u16 val, u8 reg)
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@ -3122,16 +3124,19 @@ void ARMv5::DWrite16_5()
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u32 addr = FetchAddr[reg];
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u16 val = STRVal[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp += ((4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][0] + 1;
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BusWrite16(addr, val);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp -= 1;
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][0];
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DataCycles = 3<<NDS.ARM9ClockShift;
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DataRegion = NDS.ARM9Regions[addr>>14];
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if (WBTimestamp < ((NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
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WBTimestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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BusWrite16(addr, val);
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}
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bool ARMv5::DataWrite32(u32 addr, u32 val, u8 reg)
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@ -3261,16 +3266,19 @@ void ARMv5::DWrite32_5()
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u32 addr = FetchAddr[reg];
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u32 val = STRVal[reg];
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
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if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp += ((4 - NDS.ARM9ClockShift) << NDS.ARM9ClockShift);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][1] + 1;
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BusWrite32(addr, val);
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NDS.DMA9Timestamp = NDS.ARM9Timestamp -= 1;
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NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr >> 14][1];
|
||||
DataCycles = 3<<NDS.ARM9ClockShift;
|
||||
DataRegion = NDS.ARM9Regions[addr>>14];
|
||||
|
||||
if (WBTimestamp < ((NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
|
||||
WBTimestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
|
||||
BusWrite32(addr, val);
|
||||
STRRegs &= ~1<<reg;
|
||||
}
|
||||
|
||||
|
|
@ -3381,13 +3389,12 @@ void ARMv5::DWrite32S_4()
|
|||
}
|
||||
else
|
||||
{
|
||||
NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
QueueFunction(&ARMv5::DWrite32S_5A);
|
||||
}
|
||||
}
|
||||
else // ns
|
||||
{
|
||||
NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
|
||||
if ((addr >> 24) == 0x02)
|
||||
{
|
||||
MRTrack.Type = MainRAMType::Fetch;
|
||||
|
|
@ -3398,6 +3405,7 @@ void ARMv5::DWrite32S_4()
|
|||
}
|
||||
else
|
||||
{
|
||||
NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
QueueFunction(&ARMv5::DWrite32S_5B);
|
||||
}
|
||||
}
|
||||
|
|
@ -3409,15 +3417,19 @@ void ARMv5::DWrite32S_5A()
|
|||
u32 addr = FetchAddr[reg];
|
||||
u32 val = STRVal[reg];
|
||||
|
||||
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
|
||||
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
|
||||
NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr>>14][2] + 1;
|
||||
|
||||
BusWrite32(addr, val);
|
||||
|
||||
NDS.DMA9Timestamp = NDS.ARM9Timestamp -= 1;
|
||||
|
||||
NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr>>14][2];
|
||||
DataRegion = NDS.ARM9Regions[addr>>14];
|
||||
|
||||
if (WBTimestamp < ((NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
|
||||
WBTimestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
|
||||
BusWrite32(addr, val);
|
||||
STRRegs &= ~1<<reg;
|
||||
}
|
||||
|
||||
|
|
@ -3427,16 +3439,20 @@ void ARMv5::DWrite32S_5B()
|
|||
u32 addr = FetchAddr[reg];
|
||||
u32 val = STRVal[reg];
|
||||
|
||||
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
|
||||
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = (NDS.DMA9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
|
||||
NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr>>14][1] + 1;
|
||||
|
||||
BusWrite32(addr, val);
|
||||
|
||||
NDS.DMA9Timestamp = NDS.ARM9Timestamp -= 1;
|
||||
|
||||
NDS.DMA9Timestamp = NDS.ARM9Timestamp += MemTimings[addr>>14][1];
|
||||
DataCycles = 3 << NDS.ARM9ClockShift;
|
||||
DataRegion = NDS.ARM9Regions[addr>>14];
|
||||
|
||||
if (WBTimestamp < ((NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
|
||||
WBTimestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
|
||||
|
||||
BusWrite32(addr, val);
|
||||
STRRegs &= ~1<<reg;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -165,9 +165,9 @@ void NDS::SetARM9RegionTimings(u32 addrstart, u32 addrend, u32 region, int buswi
|
|||
for (u32 i = addrstart; i < addrend; i++)
|
||||
{
|
||||
// CPU timings
|
||||
ARM9MemTimings[i][0] = N16 + cpuN;
|
||||
ARM9MemTimings[i][0] = N16;// + cpuN;
|
||||
ARM9MemTimings[i][1] = S16;
|
||||
ARM9MemTimings[i][2] = N32 + cpuN;
|
||||
ARM9MemTimings[i][2] = N32;// + cpuN;
|
||||
ARM9MemTimings[i][3] = S32;
|
||||
|
||||
// DMA timings
|
||||
|
|
@ -2532,7 +2532,7 @@ void NDS::RunTimers(u32 cpu)
|
|||
s32 cycles;
|
||||
|
||||
if (cpu == 0)
|
||||
cycles = (ARM9Timestamp >> ARM9ClockShift) - TimerTimestamp[0];
|
||||
cycles = (std::max(ARM9Timestamp, DMA9Timestamp) >> ARM9ClockShift) - TimerTimestamp[0];
|
||||
else
|
||||
cycles = ARM7Timestamp - TimerTimestamp[1];
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue