KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
Add Stage-2 mmu data structures for virtual EL2 and for nested guests. We don't yet populate shadow Stage-2 page tables, but we now have a framework for getting to a shadow Stage-2 pgd. We allocate twice the number of vcpus as Stage-2 mmu structures because that's sufficient for each vcpu running two translation regimes without having to flush the Stage-2 page tables. Co-developed-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20240614144552.2773592-2-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
This commit is contained in:
Marc Zyngier
Oliver Upton
parent
83a7eefedc
commit
4f128f8e1a
7 changed files with 349 additions and 21 deletions
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@ -189,6 +189,33 @@ struct kvm_s2_mmu {
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uint64_t split_page_chunk_size;
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struct kvm_arch *arch;
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/*
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* For a shadow stage-2 MMU, the virtual vttbr used by the
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* host to parse the guest S2.
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* This either contains:
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* - the virtual VTTBR programmed by the guest hypervisor with
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* CnP cleared
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* - The value 1 (VMID=0, BADDR=0, CnP=1) if invalid
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*
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* We also cache the full VTCR which gets used for TLB invalidation,
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* taking the ARM ARM's "Any of the bits in VTCR_EL2 are permitted
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* to be cached in a TLB" to the letter.
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*/
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u64 tlb_vttbr;
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u64 tlb_vtcr;
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/*
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* true when this represents a nested context where virtual
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* HCR_EL2.VM == 1
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*/
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bool nested_stage2_enabled;
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/*
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* 0: Nobody is currently using this, check vttbr for validity
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* >0: Somebody is actively using this.
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*/
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atomic_t refcnt;
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};
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struct kvm_arch_memory_slot {
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@ -256,6 +283,14 @@ struct kvm_arch {
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*/
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u64 fgu[__NR_FGT_GROUP_IDS__];
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/*
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* Stage 2 paging state for VMs with nested S2 using a virtual
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* VMID.
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*/
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struct kvm_s2_mmu *nested_mmus;
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size_t nested_mmus_size;
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int nested_mmus_next;
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/* Interrupt controller */
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struct vgic_dist vgic;
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@ -1306,6 +1341,7 @@ void kvm_vcpu_load_vhe(struct kvm_vcpu *vcpu);
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void kvm_vcpu_put_vhe(struct kvm_vcpu *vcpu);
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int __init kvm_set_ipa_limit(void);
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u32 kvm_get_pa_bits(struct kvm *kvm);
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#define __KVM_HAVE_ARCH_VM_ALLOC
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struct kvm *kvm_arch_alloc_vm(void);
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@ -98,6 +98,7 @@ alternative_cb_end
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#include <asm/mmu_context.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_host.h>
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#include <asm/kvm_nested.h>
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void kvm_update_va_mask(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst);
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@ -165,6 +166,8 @@ int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
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int create_hyp_stack(phys_addr_t phys_addr, unsigned long *haddr);
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void __init free_hyp_pgds(void);
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void kvm_stage2_unmap_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size);
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void stage2_unmap_vm(struct kvm *kvm);
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int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long type);
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void kvm_uninit_stage2_mmu(struct kvm *kvm);
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@ -326,5 +329,26 @@ static inline struct kvm *kvm_s2_mmu_to_kvm(struct kvm_s2_mmu *mmu)
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{
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return container_of(mmu->arch, struct kvm, arch);
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}
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static inline u64 get_vmid(u64 vttbr)
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{
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return (vttbr & VTTBR_VMID_MASK(kvm_get_vmid_bits())) >>
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VTTBR_VMID_SHIFT;
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}
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static inline bool kvm_s2_mmu_valid(struct kvm_s2_mmu *mmu)
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{
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return !(mmu->tlb_vttbr & VTTBR_CNP_BIT);
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}
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static inline bool kvm_is_nested_s2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu)
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{
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/*
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* Be careful, mmu may not be fully initialised so do look at
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* *any* of its fields.
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*/
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return &kvm->arch.mmu != mmu;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARM64_KVM_MMU_H__ */
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@ -61,6 +61,12 @@ static inline u64 translate_ttbr0_el2_to_ttbr0_el1(u64 ttbr0)
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}
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extern bool forward_smc_trap(struct kvm_vcpu *vcpu);
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extern void kvm_init_nested(struct kvm *kvm);
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extern int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu);
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extern void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu);
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extern struct kvm_s2_mmu *lookup_s2_mmu(struct kvm_vcpu *vcpu);
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extern void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu);
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extern void kvm_vcpu_put_hw_mmu(struct kvm_vcpu *vcpu);
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int kvm_init_nv_sysregs(struct kvm *kvm);
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@ -170,6 +170,8 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
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mutex_unlock(&kvm->lock);
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#endif
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kvm_init_nested(kvm);
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ret = kvm_share_hyp(kvm, kvm + 1);
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if (ret)
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return ret;
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@ -551,6 +553,9 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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struct kvm_s2_mmu *mmu;
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int *last_ran;
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if (vcpu_has_nv(vcpu))
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kvm_vcpu_load_hw_mmu(vcpu);
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mmu = vcpu->arch.hw_mmu;
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last_ran = this_cpu_ptr(mmu->last_vcpu_ran);
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@ -601,6 +606,8 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
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kvm_timer_vcpu_put(vcpu);
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kvm_vgic_put(vcpu);
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kvm_vcpu_pmu_restore_host(vcpu);
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if (vcpu_has_nv(vcpu))
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kvm_vcpu_put_hw_mmu(vcpu);
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kvm_arm_vmid_clear_active();
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vcpu_clear_on_unsupported_cpu(vcpu);
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@ -1459,6 +1466,10 @@ static int kvm_setup_vcpu(struct kvm_vcpu *vcpu)
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if (kvm_vcpu_has_pmu(vcpu) && !kvm->arch.arm_pmu)
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ret = kvm_arm_set_default_pmu(kvm);
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/* Prepare for nested if required */
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if (!ret && vcpu_has_nv(vcpu))
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ret = kvm_vcpu_init_nested(vcpu);
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return ret;
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}
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@ -328,7 +328,7 @@ static void __unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64
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may_block));
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}
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static void unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size)
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void kvm_stage2_unmap_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size)
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{
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__unmap_stage2_range(mmu, start, size, true);
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}
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@ -855,21 +855,9 @@ static struct kvm_pgtable_mm_ops kvm_s2_mm_ops = {
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.icache_inval_pou = invalidate_icache_guest_page,
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};
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/**
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* kvm_init_stage2_mmu - Initialise a S2 MMU structure
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* @kvm: The pointer to the KVM structure
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* @mmu: The pointer to the s2 MMU structure
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* @type: The machine type of the virtual machine
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*
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* Allocates only the stage-2 HW PGD level table(s).
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* Note we don't need locking here as this is only called when the VM is
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* created, which can only be done once.
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*/
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int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long type)
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static int kvm_init_ipa_range(struct kvm_s2_mmu *mmu, unsigned long type)
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{
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u32 kvm_ipa_limit = get_kvm_ipa_limit();
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int cpu, err;
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struct kvm_pgtable *pgt;
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u64 mmfr0, mmfr1;
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u32 phys_shift;
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@ -896,11 +884,51 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long t
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mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);
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mmu->vtcr = kvm_get_vtcr(mmfr0, mmfr1, phys_shift);
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return 0;
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}
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/**
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* kvm_init_stage2_mmu - Initialise a S2 MMU structure
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* @kvm: The pointer to the KVM structure
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* @mmu: The pointer to the s2 MMU structure
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* @type: The machine type of the virtual machine
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*
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* Allocates only the stage-2 HW PGD level table(s).
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* Note we don't need locking here as this is only called in two cases:
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*
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* - when the VM is created, which can't race against anything
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*
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* - when secondary kvm_s2_mmu structures are initialised for NV
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* guests, and the caller must hold kvm->lock as this is called on a
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* per-vcpu basis.
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*/
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int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long type)
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{
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int cpu, err;
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struct kvm_pgtable *pgt;
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/*
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* If we already have our page tables in place, and that the
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* MMU context is the canonical one, we have a bug somewhere,
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* as this is only supposed to ever happen once per VM.
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*
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* Otherwise, we're building nested page tables, and that's
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* probably because userspace called KVM_ARM_VCPU_INIT more
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* than once on the same vcpu. Since that's actually legal,
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* don't kick a fuss and leave gracefully.
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*/
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if (mmu->pgt != NULL) {
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if (kvm_is_nested_s2_mmu(kvm, mmu))
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return 0;
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kvm_err("kvm_arch already initialized?\n");
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return -EINVAL;
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}
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err = kvm_init_ipa_range(mmu, type);
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if (err)
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return err;
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pgt = kzalloc(sizeof(*pgt), GFP_KERNEL_ACCOUNT);
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if (!pgt)
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return -ENOMEM;
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@ -925,6 +953,10 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long t
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mmu->pgt = pgt;
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mmu->pgd_phys = __pa(pgt->pgd);
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if (kvm_is_nested_s2_mmu(kvm, mmu))
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kvm_init_nested_s2_mmu(mmu);
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return 0;
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out_destroy_pgtable:
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@ -976,7 +1008,7 @@ static void stage2_unmap_memslot(struct kvm *kvm,
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if (!(vma->vm_flags & VM_PFNMAP)) {
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gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
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unmap_stage2_range(&kvm->arch.mmu, gpa, vm_end - vm_start);
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kvm_stage2_unmap_range(&kvm->arch.mmu, gpa, vm_end - vm_start);
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}
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hva = vm_end;
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} while (hva < reg_end);
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@ -2022,11 +2054,6 @@ void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
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{
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}
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void kvm_arch_flush_shadow_all(struct kvm *kvm)
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{
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kvm_uninit_stage2_mmu(kvm);
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}
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void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
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struct kvm_memory_slot *slot)
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{
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@ -2034,7 +2061,7 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
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phys_addr_t size = slot->npages << PAGE_SHIFT;
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write_lock(&kvm->mmu_lock);
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unmap_stage2_range(&kvm->arch.mmu, gpa, size);
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kvm_stage2_unmap_range(&kvm->arch.mmu, gpa, size);
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write_unlock(&kvm->mmu_lock);
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}
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@ -7,7 +7,9 @@
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_mmu.h>
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#include <asm/kvm_nested.h>
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#include <asm/sysreg.h>
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@ -16,6 +18,222 @@
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/* Protection against the sysreg repainting madness... */
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#define NV_FTR(r, f) ID_AA64##r##_EL1_##f
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/*
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* Ratio of live shadow S2 MMU per vcpu. This is a trade-off between
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* memory usage and potential number of different sets of S2 PTs in
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* the guests. Running out of S2 MMUs only affects performance (we
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* will invalidate them more often).
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*/
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#define S2_MMU_PER_VCPU 2
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void kvm_init_nested(struct kvm *kvm)
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{
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kvm->arch.nested_mmus = NULL;
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kvm->arch.nested_mmus_size = 0;
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}
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static int init_nested_s2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu)
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{
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/*
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* We only initialise the IPA range on the canonical MMU, which
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* defines the contract between KVM and userspace on where the
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* "hardware" is in the IPA space. This affects the validity of MMIO
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* exits forwarded to userspace, for example.
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*
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* For nested S2s, we use the PARange as exposed to the guest, as it
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* is allowed to use it at will to expose whatever memory map it
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* wants to its own guests as it would be on real HW.
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*/
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return kvm_init_stage2_mmu(kvm, mmu, kvm_get_pa_bits(kvm));
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}
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int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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struct kvm_s2_mmu *tmp;
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int num_mmus, ret = 0;
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/*
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* Let's treat memory allocation failures as benign: If we fail to
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* allocate anything, return an error and keep the allocated array
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* alive. Userspace may try to recover by intializing the vcpu
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* again, and there is no reason to affect the whole VM for this.
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*/
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num_mmus = atomic_read(&kvm->online_vcpus) * S2_MMU_PER_VCPU;
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tmp = kvrealloc(kvm->arch.nested_mmus,
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size_mul(sizeof(*kvm->arch.nested_mmus), kvm->arch.nested_mmus_size),
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size_mul(sizeof(*kvm->arch.nested_mmus), num_mmus),
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GFP_KERNEL_ACCOUNT | __GFP_ZERO);
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if (!tmp)
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return -ENOMEM;
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/*
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* If we went through a realocation, adjust the MMU back-pointers in
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* the previously initialised kvm_pgtable structures.
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*/
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if (kvm->arch.nested_mmus != tmp)
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for (int i = 0; i < kvm->arch.nested_mmus_size; i++)
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tmp[i].pgt->mmu = &tmp[i];
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for (int i = kvm->arch.nested_mmus_size; !ret && i < num_mmus; i++)
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ret = init_nested_s2_mmu(kvm, &tmp[i]);
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if (ret) {
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for (int i = kvm->arch.nested_mmus_size; i < num_mmus; i++)
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kvm_free_stage2_pgd(&tmp[i]);
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return ret;
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}
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kvm->arch.nested_mmus_size = num_mmus;
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kvm->arch.nested_mmus = tmp;
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return 0;
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}
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struct kvm_s2_mmu *lookup_s2_mmu(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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bool nested_stage2_enabled;
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u64 vttbr, vtcr, hcr;
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lockdep_assert_held_write(&kvm->mmu_lock);
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vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);
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vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);
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hcr = vcpu_read_sys_reg(vcpu, HCR_EL2);
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nested_stage2_enabled = hcr & HCR_VM;
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/* Don't consider the CnP bit for the vttbr match */
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vttbr &= ~VTTBR_CNP_BIT;
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/*
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* Two possibilities when looking up a S2 MMU context:
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*
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* - either S2 is enabled in the guest, and we need a context that is
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* S2-enabled and matches the full VTTBR (VMID+BADDR) and VTCR,
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* which makes it safe from a TLB conflict perspective (a broken
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* guest won't be able to generate them),
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*
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* - or S2 is disabled, and we need a context that is S2-disabled
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* and matches the VMID only, as all TLBs are tagged by VMID even
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* if S2 translation is disabled.
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*/
|
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for (int i = 0; i < kvm->arch.nested_mmus_size; i++) {
|
||||
struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
|
||||
|
||||
if (!kvm_s2_mmu_valid(mmu))
|
||||
continue;
|
||||
|
||||
if (nested_stage2_enabled &&
|
||||
mmu->nested_stage2_enabled &&
|
||||
vttbr == mmu->tlb_vttbr &&
|
||||
vtcr == mmu->tlb_vtcr)
|
||||
return mmu;
|
||||
|
||||
if (!nested_stage2_enabled &&
|
||||
!mmu->nested_stage2_enabled &&
|
||||
get_vmid(vttbr) == get_vmid(mmu->tlb_vttbr))
|
||||
return mmu;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static struct kvm_s2_mmu *get_s2_mmu_nested(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm *kvm = vcpu->kvm;
|
||||
struct kvm_s2_mmu *s2_mmu;
|
||||
int i;
|
||||
|
||||
lockdep_assert_held_write(&vcpu->kvm->mmu_lock);
|
||||
|
||||
s2_mmu = lookup_s2_mmu(vcpu);
|
||||
if (s2_mmu)
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* Make sure we don't always search from the same point, or we
|
||||
* will always reuse a potentially active context, leaving
|
||||
* free contexts unused.
|
||||
*/
|
||||
for (i = kvm->arch.nested_mmus_next;
|
||||
i < (kvm->arch.nested_mmus_size + kvm->arch.nested_mmus_next);
|
||||
i++) {
|
||||
s2_mmu = &kvm->arch.nested_mmus[i % kvm->arch.nested_mmus_size];
|
||||
|
||||
if (atomic_read(&s2_mmu->refcnt) == 0)
|
||||
break;
|
||||
}
|
||||
BUG_ON(atomic_read(&s2_mmu->refcnt)); /* We have struct MMUs to spare */
|
||||
|
||||
/* Set the scene for the next search */
|
||||
kvm->arch.nested_mmus_next = (i + 1) % kvm->arch.nested_mmus_size;
|
||||
|
||||
/* Clear the old state */
|
||||
if (kvm_s2_mmu_valid(s2_mmu))
|
||||
kvm_stage2_unmap_range(s2_mmu, 0, kvm_phys_size(s2_mmu));
|
||||
|
||||
/*
|
||||
* The virtual VMID (modulo CnP) will be used as a key when matching
|
||||
* an existing kvm_s2_mmu.
|
||||
*
|
||||
* We cache VTCR at allocation time, once and for all. It'd be great
|
||||
* if the guest didn't screw that one up, as this is not very
|
||||
* forgiving...
|
||||
*/
|
||||
s2_mmu->tlb_vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2) & ~VTTBR_CNP_BIT;
|
||||
s2_mmu->tlb_vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);
|
||||
s2_mmu->nested_stage2_enabled = vcpu_read_sys_reg(vcpu, HCR_EL2) & HCR_VM;
|
||||
|
||||
out:
|
||||
atomic_inc(&s2_mmu->refcnt);
|
||||
return s2_mmu;
|
||||
}
|
||||
|
||||
void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu)
|
||||
{
|
||||
/* CnP being set denotes an invalid entry */
|
||||
mmu->tlb_vttbr = VTTBR_CNP_BIT;
|
||||
mmu->nested_stage2_enabled = false;
|
||||
atomic_set(&mmu->refcnt, 0);
|
||||
}
|
||||
|
||||
void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (is_hyp_ctxt(vcpu)) {
|
||||
vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu;
|
||||
} else {
|
||||
write_lock(&vcpu->kvm->mmu_lock);
|
||||
vcpu->arch.hw_mmu = get_s2_mmu_nested(vcpu);
|
||||
write_unlock(&vcpu->kvm->mmu_lock);
|
||||
}
|
||||
}
|
||||
|
||||
void kvm_vcpu_put_hw_mmu(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (kvm_is_nested_s2_mmu(vcpu->kvm, vcpu->arch.hw_mmu)) {
|
||||
atomic_dec(&vcpu->arch.hw_mmu->refcnt);
|
||||
vcpu->arch.hw_mmu = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void kvm_arch_flush_shadow_all(struct kvm *kvm)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < kvm->arch.nested_mmus_size; i++) {
|
||||
struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
|
||||
|
||||
if (!WARN_ON(atomic_read(&mmu->refcnt)))
|
||||
kvm_free_stage2_pgd(mmu);
|
||||
}
|
||||
kfree(kvm->arch.nested_mmus);
|
||||
kvm->arch.nested_mmus = NULL;
|
||||
kvm->arch.nested_mmus_size = 0;
|
||||
kvm_uninit_stage2_mmu(kvm);
|
||||
}
|
||||
|
||||
/*
|
||||
* Our emulated CPU doesn't support all the possible features. For the
|
||||
* sake of simplicity (and probably mental sanity), wipe out a number
|
||||
|
|
|
|||
|
|
@ -268,6 +268,12 @@ void kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
|||
preempt_enable();
|
||||
}
|
||||
|
||||
u32 kvm_get_pa_bits(struct kvm *kvm)
|
||||
{
|
||||
/* Fixed limit until we can configure ID_AA64MMFR0.PARange */
|
||||
return kvm_ipa_limit;
|
||||
}
|
||||
|
||||
u32 get_kvm_ipa_limit(void)
|
||||
{
|
||||
return kvm_ipa_limit;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue